One gate element often used in integrated circuit designs is a tristate buffer. As the term is used herein, “integrated circuit” includes devices such as those formed on monolithic semiconducting substrates, such as those formed of group IV materials like silicon or germanium, or group III-V compounds like gallium arsenide, or mixtures of such materials. The term includes all types of devices formed, such as memory and logic, and all designs of such devices, such as MOS and bipolar. The term also comprehends applications such as flat panel displays, solar cells, and charge coupled devices. Tristate buffers are active gate devices that produce as an output one of three logic states, being a logical high, a logical low, and no output at all, which is the tristate.
Tristate buffers have an input and a control. An active high tristate buffer will pass through the value of the input (be it either high or low) when the control line is in a high state, but will not pass through any value—high or low—when the control line is in a low state. Conversely, an active low tristate buffer will pass through the value of the input when the control line is in a low state, but will not pass through any value when the control line is in a high state.
Integrated circuits are typically functionally tested using advanced equipment called automated test pattern generators. Automated test pattern generators test an integrated circuit by finding a test sequence that enables the tester to distinguish between correct integrated circuit behavior and faulty integrated circuit behavior that is caused by defects.
Unfortunately, for a variety of reasons, tristate busses in a traditional integrated circuit design cannot be tested via automated test pattern generators for the ability of all of the tristate drivers to enter a tristate state.
What is needed, therefore, is an integrated circuit design that enables an automated test pattern generator to more fully test the proper operation of tristate busses.